All language subtitles for TSP #133 - Keysight UXR 110GHz BW, 256GS_s, 10-bit Real-Time Oscilloscope Teardown &

hi welcome to signalpad i have a really

special episode for you guys today

i have the privilege of introducing you

to the keysight uxr series

real-time oscilloscope this oscilloscope

isn't just a little bit better than the

study art it's a giant leap forward

it can do 256 giga sample per second

with 110 gigahertz of analog bandwidth

on four channels simultaneously

and it does that with a 10 bit

resolution a to d converter

and it doesn't matter how many charge

channels you have active because it does

256 gig sampling all the channels at the

same time

this means that it captures processes

displays and stores over

10 terabit per second of information in

just this one box it's

just unbelievable in order to get to

this kind of specification

they've had to innovate at every layer

of the design and everything had to be

custom made from scratch

from the front-end connector to the

pre-amplifier to the samplers

to the a2d converters and even to the ic

that interfaces

the memory to the hdd converter had to

be completely custom made

in order to accommodate this massive

amount of data that's being captured

they also had to create their own

calibrator module with nist calibration

certificate which they can ship to you

and you can calibrate your scope

directly in the lab there's really

nothing else like this and the fact that

they have gone to this point is really

amazing if i told you a couple of years

ago

these numbers you would have never

believed it now this 10-bit atd

converter

which is sitting at the heart of this

scope is the same one that's in the

asterisk

which i did a full teardown and review

and that that's been refined and

upgraded

to be put in here now not only are we

going to take a look at it

and see how it behaves i'm going to take

it apart well not quite take it apart

but they've really sent me

the acquisition board and they've sent

me the front-end sampling modules

i'm going to take off the part look at

it under the microscope

and really give you a detailed view of

how it works what kind of engineers gone

into it

i'm going to take a look at how they've

accomplished this massive amount of

bandwidth it's actually 113 gigahertz

which is extraordinary there's so much

you can do with this there's

it opens up test and measurement

capability for optical coherent

communication and even wireless

communication if you want to capture

many wireless channels at the same time

like nothing else before

so i'm really eager to take a look at it

it's going to be a long video broken

into a few sections you can look at the

description to jump to the section you

want

this is still a prototype so for really

detailed testing we're going to have to

wait a little bit longer but i still do

a couple of experiments with it which i

think shows you how

amazing it is and what it can be done

with it so without any waiting let's go

check it out

so before we look at the architecture of

the new oscilloscope i think it's

worthwhile to appreciate how people have

been doing this kind of

high frequency sampling in the past or

at least up to this point

now tektronix likroy and keysight all

have

employed various techniques to overcome

the limitations of time interleave a td

converters

for example lacroix does the digital

bandwidth interleaving which is

something that they have invented

when i did the full teardown analysis of

their scope we talked

extensively about how that architecture

works by splitting the frequency

into two bands and then looking at the

esp and combining them now keysight has

their own real edge technology

which works in a somewhat similar way it

has some differences

between their implementation and the

electro implementation and of course the

tektronix asynchronous

timing to leave architecture which came

a little bit later also

uses some tricks on how to with dsp to

correct how they sample the front end by

using completely asynchronous

sampling now all of these techniques

they work to some extent but they all

suffer from

some basic limitations these these

techniques of combining signals

afterwards in dsp

always has the limitations of noise

being overlapped

the tones being generated at the

boundaries where frequencies overlapping

it's a quite difficult a problem and dsp

intensive problem

to solve this and they work and they

have been demonstrated up to about 70

gigahertz or so

from all of these companies but what

keysight wanted to do here

is to go back to really do time

interleaving basically

truly do 264 giga sample per second

really and and get all the bandwidth

from the front-end process by the

single asic all the way up to 110

gigahertz and that's exactly what they

have

done here and this is a very basic

representation of their instrument it's

very simple it's just pre-amplifier

samplers

and other samplers and then buffers and

adcs exactly how a time interleaved

architecture would be like and this time

into leave architecture is

time interleaved in several layers uh

first is timing to leave between

chipsets

and then within the chip says the time

interleaved between adc's and we'll talk

about that

in detail but really the architecture is

pretty straightforward and this is what

the architecture of pretty much

every oscilloscope and that relies on

time interleaving architecture without

doing any

fancy frequency interleaving or anything

like that this is what it's going to

look like

so now that we know this let's go ahead

and take a look at these blocks a couple

of these pictures here for example the

front end is

pretty interesting the acquisition board

is interesting and i have those and

let's go take a look and see

how they're made and here we have all

the hardware required for 256 giga

sample per second

of data acquisition storage and

processing there's a lot here to talk

about

and we're lucky enough to have all the

hardware to take a look at it now here's

the main

110 gigahertz front-end sampler module

here's the two-channel version for the

lower models we'll talk about it as well

and of course the entire acquisition

board adc's

the chipset that interfaces with the

adcs and the hypercube memory module

which is all the way at the back and

we'll take a look at these in detail

now what's amazing is that we're also

given the ability to take a close look

at the front-end module where all the

magic with 110 gigahertz of bandwidth

and sampling happens

you can see here that the back of the

lid we have rf absorbers strategically

placed on top of the rfi season some of

the critical traces

this is to be expected because

everything here is in a faraday cage

you may not be able to see through the

camera but we will be able to see when

we look at it

closely that these walls are all coming

off the surface of the pcb and you're

creating all these cavities and if

you're not careful

you're going to create second modes in

there and it will be such a high quality

factor

you will get resonances and potentially

even oscillations so they've

obviously thought of that this is what

they do all the time

now we're going to take a close look in

the front end i'm interested to see how

the analog data is handled how is the

clocking handle

clocking for a to d converters is

critical if you're not if you don't have

a line clocks but for these samplers

you're going to have tones and spurs all

over the place

in the spectrum after the data

converters so there's a ton of

engineering that's gone into this

as well as multiple technologies used to

build this front-end

so i'm going to take a really close look

at this and analyze it in a way reverse

engineer it to some extent

and then we'll jump into looking at a

data converter and

the chips that they've created for the

interface the dsp there's a ton of stuff

in here and of course

the two-channel version so without

keeping you waiting let's go and take a

zoomed in view of this and i'll go over

it step by step

and see how it works so let's take a

look at this front end and really

analyze exactly what's going on and

there's a lot of things happening here

but we should kind of break it down step

by step i think the easiest place to

start

is just the front-end so the input

signal enters the device from here

this is going to be a one millimeter

connector in the hundred and

ten gigahertz version of this instrument

now before this connector there is an

electromechanical attenuator

and that electromechanical antenna sits

between the front panel connector

and the sampler module here that you see

and the reason they put the

electromechanical attenuator is because

there is no way to get

the massive dynamic range required from

you know a volt per division all the way

down to a millivolt per division going

directly into the front-end amplifier

so they divide the task of attenuation

between the mechanical

and the solid state attenuator or the

amplifier that's the front and this is

common this is done all the time

however you have to appreciate the

difficulty in doing this because

the loss and the frequency flatness of

the mechanical attenuator

the interfaces between the connectors

and the module all of those are going to

make it difficult to get

110 gigahertz bandwidth signal into this

module so they have

custom design all of these these modules

are made to each other

there's no cable in between everything's

assembled mechanically together

so having said that let's assume that

the 110 gigahertz signal simply enters

this front-end module after the

mechanical attenuator

we have a very small trace then we have

two amplifiers in a row there's two

chipsets here

these are indium phosphite front-end

amplifiers and vgas

so your solid state valuable gain

amplifier control

and the front-end amplifier that handles

110 gigahertz of signal is all done here

the system linearity the system noise

and the performance is determined

by these front-end amplifiers you can

imagine how difficult it is to design

this to have such a noise to actually

get anything meaningful from the a2d

converters that follow after many stages

the amount of components that are

actually cascaded before you hit the

a2ds is

staggering and to be able to meet the

linearity and the noise for that

is really quite amazing so having said

that this indium phosphide front-end

amplifiers are designed by keysight

in their own foundry they have their own

foundry that make indium phosphite

devices up to 600 or 700 gigahertz

ftf max i can't quite remember the exact

numbers but

you know needless to say this is a very

fast process so now signal coming out of

here at this point

is still a 110 gigahertz signal now

there's also a path coming out here

all the way going into this device here

this is an edge trigger

this is a 24 gigahertz edge trigger

device it's actually not really used in

this because

24 gigahertz of edge trigger is kind of

a legacy

architecture for being able to detect

edges up to 24 gigahertz but when you

have 110 gigahertz of bandwidth

you don't really want to use the 24 gig

edge trigger anymore

this entire oscilloscope uses a digital

trigger so all of that is handled by the

dsp custom digital asic that they have

designed that follows the

a to d converts we'll talk about that

when we get there but the hardware for

an analog 24 gigahertz edge trigger is

still present here

the signal after that goes into our

first sampler now here's the first

really complex uh device that is also an

indium phosphide

is presented now this device is going to

take her 110 gigahertz signal

is going to sample it with a 64

gigahertz clock

in four phases in order to generate four

signals coming out each of them now

having bandwidth of up to 32 gigahertz

this is how you get

the reduction in required bandwidth as

the stages follow on this is again

a normal architecture for time

interleaved data converters

so therefore we will have four paths one

path over here one path over here

one path over here and one path over

here so we would expect these four paths

to go into the next stages of samplers

in order to be able to further break

down the bandwidth so that you can

actually

use the a2d converters inputs so how do

we do this

64 gigahertz for phase sampling

that itself is really difficult so for

to understand that we have to go from

the side where the clock is now

generated

now there's an ic over here which you

can barely see the edge of this is a

hittite part this is a

12 to 16 gigahertz to up to 17 gigahertz

amplifier it has

a p1 db of 26 dbm so you can put out

tons of power

which is required because they're going

to divide that clock signal further down

now it appears that the 16 gigahertz

system clock comes from here but if i

understand correctly that itself is

generated from an

eight gigahertz fundamental clock which

is spread throughout the entire chassis

connecting all the different samplers

and connecting all the different atd

converters

to a common synthesized clock which

again is all designed by keysight

generating an eight gigahertz clock

clean enough to be able to feed

256 giga sample per second equivalent

sampling is really challenging

now i don't have that board

unfortunately but needless to say

it's you know in the in the 10

femtosecond range clock which is

really amazing so now that it doubled

that apparently at some point and then

we get the 16 gigahertz clock and there

is a first

power splitter here that power splitter

splits the signal into two parts

one side of it goes in here now this

disappears into the board

but you can kind of roughly uh see where

it would go it would have to come all

the way over here and this goes

underneath this module

and then comes out of here and pops into

this so now you have a 16 gigahertz

signal going into this chain

over here first they do some some

filtering to make sure you know there's

only a single tone

and then they double it once here so

that times two

over here that's doubled so now it's at

32 gigahertz

once again they filter it very carefully

and then they double it again

one more time now we are sitting at 64

gigahertz

now single is still single-ended which

means that it needs to become

differentials there's after some

filtering

there's a hybrid here you can see very

closely the hybrid splits the signal

into two pieces now that you have two

signals

that are in 180 degree out of phase and

it appears that they put them through

two separate amplifiers here

so they have two single nano distributed

amplifiers again this is all in

indium phosphide now you have a 64

gigahertz signal

on one side and a 64 gigahertz signal on

the other side so you get yourself a

differential

a 64 gigahertz signal going into the

front end indium phosphite sampler

but that's of course not in four phases

you need to generate four phases from 64

gigahertz

normally if you're in a silicon

germanium process or in a cmos process

that's

not too difficult but in indium

phosphide you gain

linearity and noise and dynamic range

but you lose

complexity of integration so making

phase shifters that are adjustable in

indium phosphide is quite difficult

now i happen to know that the way they

do this is that they double the 64

gigahertz yet again

to 128 gigahertz and then they process

that back down

in order to get the four phases which is

a common technique you can use

if you have tons of bandwidth and tons

of frequency content you can do this in

a very fast process

going the opposite direction just so

that you can create your phases

so now you have four phases of 64

gigahertz in here

which you can use to sample the

front-end 110 gigahertz signal into four

sections so all of that is again fully

key side design all of these filters

every single component you see here

has been custom designed to make this

happen you still need phase shifters

inside the front end because you need to

make sure that the

alignment between the 64 gigahertz clock

in four phases is good

and they do take care of that again

inside the three five process

amazing stuff so now you have all these

four signals now you can

get away from indium phosphide and and

make the complexity

more and create signals that can be

processed in a silicon germanium process

you don't need as much bandwidth anymore

the bandwidth of these signals coming

out of here is no longer uh

110 gigahertz is only up to 32 gigahertz

now all these traces that you see these

are all thin film deposits these are all

again done by keysight this is all

completely custom made

and you can see individual cavities here

this is this has a depth of

a couple of millimeters so when i put

the lid on top of this

all of these are in fahrenheit cages and

you can see that they

isolate the traces from each other and

these are high bandwidth

very low skew good group delay paths

created to make the signal as nicely

preserved as much as possible before

it hits the next samplers there

now going forward let me change the

color here so that we can

do the second stage with a different

color all right let's take a look at the

what happens after that let's go back to

the clock so now the other path of the

clock the other 16 gigahertz clock goes

into this

hybrid here which then further splits

the signal into four so now you got one

two three four pads each of them 16

gigahertz again

you can use this to feed the samplers

of the stages that follow so now

following over here we go into this

here's the another sampler here is

another sampler

going over here is the third one and

going over here

here's our fourth one now these clocks

that are

disappearing into the pcb you can see

the trace is over there one of them pops

over here

the other one pops over here this one

where does it go

right there and the last one goes all

the way here and pops out of here

and if you look closely you can see that

they take the 16 gigahertz signal and

not only do they filter it but they also

passively create a 180 degree

hybrid here so there's a balance in

there plus the filter feeding the 16

gigahertz clock

into the sampler here now this is a

silicon germanium sampler

you can generate four phases from the 16

gigahertz in here fairly straightforward

so there's

four phases of 16 gigahertz sampling the

front-end

signal coming over here at a bandwidth

of up to 32 gigahertz which then creates

four lanes one two three four

out of each of the samplers so you can

see that this splits into four yet again

and four over here one more time and

then four over here one two

three four and then four over here as

the last one so now

your 110 gigahertz front-end signal

has now been broken into 16 differential

pairs and these 16 differential lines

can now be fed

into the a to b converters because now

they're low enough in bandwidth each of

them has

a bandwidth of just under eight

gigahertz now 16 times eight is 128

gigahertz the bandwidth of the scope is

limited to

about 113. so each of these process a

little bit less than

eight gigahertz of signal but now that

you have this

you can feed that directly into an a2d

converter all you need is that your a

d converter must now accept four lanes

uh each of them up to eight gigahertz of

bandwidth now if you do that which means

that your a2d converters would have to

be

each 64 giga sample per second which is

exactly what it is now

the a2d converters one here second a to

b here

third a to d here and fourth a to d here

all have to work

in parallel so four times 64

you get 256 giga sample per second

but don't don't be fooled by the fact

that you keep splitting these signals

and therefore you make the job of the a

to the converter easier

the isolation and the alignment and the

matching between these paths

is critical because if you don't have

matching between them then you're going

to get spurs in the spectrum of the a2d

converters you can't just split the

signal without worrying about

how much phase noise you have how much

phase alignment you have how much

amplitude balance you have

that's what the magic of this front end

is is to be able to take 110 gigahertz

produce a signal that can actually be

processed by 64 gigahertz per second a

2d converter

now just the adc itself at 10 bits with

64 giga sum per second

is itself an engineering marvel because

it's not easy to make that

but you can see that they've broken the

front end a little bit differently

than it is in the s series oscilloscope

which i did a full teardown and review

of before

this is the same adc that has been

upgraded and refined

for this application so you can see how

they use that and

they just tweak the front end with new

devices and new configurations in order

to enable

256 gigs per second sampling now if you

look closely again

the adc inputs from each other are fully

isolated

and this reason is because it is a

little bit easier to handle

crosstalk within each adc then between

the adcs

so the isolation between the lanes of

these ones coming out is very important

i also want you to appreciate how

difficult it must be to isolate the

clock

from leaking into the a2d converters

because you have

16 gigahertz clocks everywhere in

multiple phases you have multiple

multipliers and doublers which create

harmonics and intermodulation products

all of these things coexist in this

front-end module

all of which have to be filtered

properly in order to

make sure that they don't feed into the

a2d converters so really is

extraordinary a ton of engineering has

gone into making this happen you can see

custom

packaging there's devices from different

technologies is

is amazing and what is also interesting

is everything is wire bonded

now they don't use flip chip technology

anywhere here because

you can calibrate some of those effects

out and with clever design you can get

away with using

wire bonds even up to 110 gigahertz is

which itself is quite

interesting to see so there it is that's

the front end so now you have an idea

of what happens to the 110 gigahertz

signal and how does it

end up being fed into four adc's at 64

giga sample per second

so now we can go ahead and take a look

at the acquisition module

and keeping in mind exactly what is

happening here and see how that signal

is processed

by the a2d converters and here is the

256 giga sample per second

acquisition board it is massive and it

has so many components on it

so many devices designed by keysight now

keep in mind there are four of these

inside a four channel oscilloscope

that's because that's how you're going

to get

256 gigahertz per second 110 gigahertz

per channel regardless of how the

channels are configured so it doesn't

matter if you have one channel on

or if you have four channels on you have

one of these dedicated per channel

that's one of the reasons why it's 1.3

million dollars

because you have so much independent

redundant hardware

to get the performance per channel

totally unaffected

by how much data you're collecting so as

we said

this needs to have four 64 giga sample

per second a 2d converters in order to

be able to to get to 256

gig sampling and with the 16 inputs

coming from the front end

sampler i just showed you so here's one

two

three four a to d converters and these

are the each of these are 64 gig

10 bits with four inputs you can see

some of the traces

with the microstrip or strip lines that

are going into it there's a front-end

high-speed connector and an alignment

pin that allows you to interface with

the front-end sampler so all the analog

signals

have to travel as little as possible and

they've come up with this solution with

this connector

there is a front-end sample there

modulator this thing is quite heavy

to lift oh i have it the other way

around like this and this simply plugs

in

to here like so there it is that's one

channel

and this then has to connect to the

front panel of the instrument so the

electromechanical antenna sits right

over here and right after that is the

front end

of the instrument itself so then you

stack four of these so you can imagine

the thermal management and the

mechanical management of this

itself is quite a nightmare now even

though you have

four 64 gig a2d converters here how do

you deal with the data coming out of

these because each of these is at 64gb

10 with 640

gigabit per second of data needs to be

handled not only that

these are all working together so you

need to have

the alignment the calibration all the

coefficients

to handle with the channel channels

mismatches and channel

frequency group delay variations all of

those parameters have to be somehow

handled

directly from the after the a to d

converters and more importantly what

about the trigger

this thing has a full digital trigger

per channel up to 110 gigahertz which

means that you need to also be able to

do that

live on the data as it comes in of

course you can't dump that data to a cpu

there's no way

which means you have to create a custom

digital signal processor chipset to

handle all of that and of course that's

what they've done

one two three four each of these is

independently connected and working

together at the same time to each of the

a to the converter so everything you see

under these

eight heat sinks that's keysight

technology designed and

manufactured by them just so that you

can package by them just so you can put

it on this board

now after that you need to put the data

into some kind of memory

the data is coming in at huge rates here

and the only way to handle that is

you have to use a very fast memory like

a hypercube

it's a 3d integrated memory these are

made by micron there's four of them

again

and these actually have more than a two

gigabyte of of storage or two giga

sample per of storage there's much more

but the scope doesn't use all of the

memory only uses a fraction of it

because of the 32-bit

architecture you can only address 4 gig

in total

so anyway that's a minor detail and

perhaps something that they will change

in the future but there is

memory available more than what is

expected for the scope

so now we have this chain i actually

have the ics

for each of them and we should be able

to take a look at it and i'll show you

that

in just a second to show you what goes

into those and they're decapped

so we can even look at what's underneath

them although you're really not going to

be able to see

very much because it's all flip chip

technology so take a moment and

appreciate

what's happening here how much

technology is involved because the front

has this indium phosphide

then we're going to get to silicon

germanium and then there is a two chips

inside the hd converter

silicon germanium and then 65 nanometers

cmos and after that you go into a dsp

which itself is either 24 or 28

nanometers cmos so

they've designed across so many

technologies to make this happen

this is a lot of work and it is really

amazing to see how many engineers

have to work together and how complex

this system is so let's look at it

a little bit from the edge here this is

a fairly thick board as you can imagine

because these ics have a

lot of bga balls on the back of them

when you look at the density of this

package here

and that's the digital processor part so

then all of that of course has to go

into the board so then this might be a

maybe a 32 layer board not quite sure

it's a power connector

massive massive power connector here on

the left some digital connectors on the

other side and

check this out this is just

beautiful a lot of linear technology

dc-dc converters these are the best

pretty much you can buy in the world you

can see some of the other traces going

in

there's some cable cut here it's most

likely they were injecting clock because

the clock also needs to go into these

atd converters

the clock needs to be synchronized

aligned to the clock of the front end oh

it's just an absolute nightmare

i'm going to zoom in a little bit so you

can see some of the beautiful layout

that is done here i mean take a look at

these decoupling capacitors is just

insane and they're all at 45 degree

angle because you can't

you can't fit them otherwise this thing

is is absolutely beautiful

i think i'm gonna have to take a couple

of pictures of these and make a

wallpaper

out of this it's just amazing to see how

much is going on

at the back of this board so all the

power handling all the

calculations for how to make sure

there's no noise coupling there is

what do you do with the digital noise

what do you do with analog noise it's

just crazy

that the board this board design is is

wonderful so now we can

flip it back over here and let's take a

look at inside the package of the a2d

converter

now this is the same a2d converter as

the s-series scope

let me find a good angle here so we can

also zoom into it

a little bit more there it is so this

a2d converter itself is a two-chip

module

which is a front-end silicon germanium

module that front-end handles the

amplifying and aligning and whatever it

is required to feed the signal into the

64 giga sample per second four channel

input a 2d converter which is in 65

nanometer cmos it's a very

straightforward uh packaging nothing

unusual there you can see the front end

they have done a little bit differently

in terms of where to

place the balls to create good signal

integrity and so on so two chip

solutions sigi

and cmos a hybrid adc module same thing

you will find

directly in the s series scope which

looks quite nice

so then now if you if you're keeping

track we have a front-end indium

phosphate amplifier

front-end indium phosphide sampler sigi

sampler

cd pre-amplifier 65 nanometer cmos

that's how the data

ultimately gets to the a2d converter

that's just crazy crazy

and then if you can also take a look

similarly

to the chipset that the airspeed which

is actually right on top of underneath

this heatsink

you can take that cup cap off that's a

fairly large

ic there this is a fully digital ic

which interfaces with the

a2d converters as i said tons and tons

of ios in the back there

very nice very nice design as to be

expected it looks like a

regular flip chip bga package there all

of this heatsink of course

has to come from the top flip chip gives

you that advantage to get the heat from

the top of the ic which is most

efficient

and uh these are most likely some test

uh test ports here during

during factory testing maybe it's

interesting to see what they're doing

here around the border there

and yeah it's it's 28 diameter 24.99 we

are not sure but

it has all the interfaces required to

grab data from day to day and to

interface with the hypercube

memory from micron so there it is that's

uh that's kind of what it looks like

to get from a 110 gigahertz analog input

all the way to 256 gigahertz per second

digital

sampling there now because this

front-end module is kind of

designed in such a way to accept

broken-down signals

down to you know eight up to eight

gigahertz per channel

it means that you can take advantage of

the architecture of this sampler

and break it into two and make two

128 giga sample per second front end so

you can

operate this half at 128 gig

and this app and 128 gig and created two

channel other scope

with half the sample rate if you don't

need to go to 110 gigahertz and that's

exactly what they have done

and that's what the purpose of this

other sampler module is

if you look at this other sampler module

it has the same interface connector

so you can connect directly to the same

front end here

and the only thing that's different is

that instead of having the indium

phosphite

you don't need any of phosphate anymore

because the front-end bandwidth can be

limited to 32 gigahertz if you don't

need to go above 32 gigahertz well

we can give you two channels like this

and you can have samplers that are

the same sticky samplers which are much

simpler now to work with

and the front end can be entirely done

in silicon germanium reduces the cost

significantly the components are

much much fewer everything is flip

shipped over here there's no wire

bonding

this is all reflow process makes things

significantly lower cost

and now you can have two channels up to

about 32 gigahertz a bandwidth or so

but then each of them can be 128 giga

sample per second

now this is the first time in history

ever that you have a front-end module

that can be configured in such a

flexible way

all the way up to 256 giga sample per

second so if you buy a scope

that has this in it you can keep

upgrading it by just simply changing the

front-end module by sending it to

factory they'll just change this but

they'll keep this piece

in your scope so the same chassis with

the same serial number

can be upgraded across a huge range of

bandwidths

as your needs change and that lowers the

ownership cost

of the ecosystem that's one of the key

factors here

is that you don't want to have to keep

throwing everything out and you see

here's the same

clocking scheme used in the back so it's

essentially identical

to the other one all you need to do is

just change the front end

uh back to this one if you want to go to

higher frequencies everything stays the

same and then the software

handles it really quite beautiful

amazing

amazing stuff going on here the amount

of engineering that keysight engineers

should really be proud

to put something out here on the market

so there it is that's a

detailed look at how it works how it

compares and how it's manufactured but

now

the fun part let's go turn the thing on

put some signal into it and see how it

behaves

so right now we have the scope at 500

millivolt per division which is the

maximum input signal

and this is absorbed by the front end

and mechanical attenuator

but we can go all the way down to two

millivolt per division in hardware

and there's a one millivolt per division

which is the further amplification

that's done internally

so i can go all the way down to a two

millivolt per division

and this is the the best that the

hardware can do so now the mechanical

attenuator is at zero db attenuation

and the front-end indium phosphide

pre-amplifier is at the maximum gain

this is going to be the the lowest noise

the scope is going to be able to support

now traditionally this noise goes up for

some of the other competing products but

they've kept the noise really low and

we'll take a look at that it's really

amazing

and right now we're sitting at one micro

second per division over here

but check out how far you can go it's

crazy so

we can continue to go forward right now

we are at uh

one nanosecond per division and i can

keep going all the way to one

picosecond per division one of these

horizontal divisions is one picosecond

that's

an extraordinary thing to see and this

is what you get from 256 giga sample per

second

so let's go back all the way to one

microsecond and the reason the reason i

want to go to one microsecond is because

i want to capture

a lot of noise and measure that noise by

doing an

rms calculation directly on it so right

now the scope is

set to 113 gigahertz full bandwidth and

113 gigahertz of full trigger bandwidth

so this is as much noise you can

ever collect from the front end because

this is full bandwidth at play here

so let's go ahead and see how much noise

that is i've already set that up here

there it is so the rms noise for a one

microsecond period

at 256 giga sample per second over 113

gigahertz of bandwidth

is on average about

just under 700 micro volts rms that's

wonderful that's amazing to see and it's

at minus 50 dbm

that's the in dbm equivalent of it this

is with nothing connected to the input

of the oscilloscope

as you can clearly see now this noise is

for the full bandwidth

however if you don't need 113 gigahertz

of bandwidth

you can reduce this equivalent noise by

filtering everything

that you don't want it can be all done

in dsp because the adcs are capturing

the entire bandwidth

all together at the same time anyway and

there is no

hardware filter in front of this it's

just not really possible to put anything

in the front of this

and that wouldn't degrade the

performance so they just capture

everything

and process and deal with it in the

digital dsp

chipset that i have designed directly

after the a2d converters so we can go

ahead and reduce the bandwidth

let's set the bandwidth from a let's say

113 gigahertz set it to 70 gigahertz

and keep an eye out on this number now

we are sitting

at 50 at 500 micro volt rms so you can

see that the noise is gradually going to

come down

as you reduce the bandwidth so if you

don't need 70 gigahertz no problem

we can try 30 gigahertz here you go at

30 gigahertz

we're going to be down to about 300

micro volt rms which is tiny

it's it's by far the best there is in

this kind of performance

now if i go all the way to one gigahertz

of course you can see at one gigahertz

the noise almost completely disappears

we're sitting at 73 micro volt

on average or about 0 the mean is about

80 micro volt on average

now keep in mind that this 80 micro volt

average noise is the noise from a front

end that supports 113 gigahertz of

bandwidth if you were to build a front

end only for one gigahertz of bandwidth

sure you can build that perhaps even

less noise and you can see that in the s

series scope

but this is the same front end that is

capturing 113 gigahertz of bandwidth and

for that to go this low

is just crazy and it's amazing to see

that the process and the design

of the front-end amplifier and of course

the noise from attenuators and

everything is

is quite good and this is how they get

some of the performances that they are

able to do and i'll show you that at the

very end of the video

by doing ffts and so on and you can see

exactly how much noise can be captured

so from the noise point of view this is

amazing and i will show you the

the enob as a function of noise as well

one of the other very interesting thing

about this design is that

the effective number of bits of the

scope

scales with the bandwidth you're using

and that's because it's

purely limited by the noise and it's not

limited by

harmonics and by distortion and because

if it was limited by distortion

even if you reduce the bandwidth you

wouldn't be able to get rid of it that's

a huge plus for this scope

that you can change the enop as a

function of bandwidth and we'll show you

that plots at the end

now having said that well how do you

calibrate the scope like this

you know you spend a 1.3 million dollars

you get a four channel scope on your

bench

and now you want to calibrate it and

align all the channels to each other

and make sure that the frequency

response and the group delayed response

of all the channels are matched you

would need a 110 gigahertz source and

you would need a nist calibration in

order to do this

and of course you don't want to send the

scope to keysight every time you need to

calibrate it

that wouldn't be practical so what they

have done is that they have created a

probe

that plugs in directly to the front and

that probe is their own design that

creates a very sharp edge

that allows you to calibrate the scope

to the output of the probe

and i'll show you that probe in just a

second and tell you how it works it's a

good clever way

of being able to do calibration directly

in your lab so you never have to send

the unit back

to get it miscalibrated and here's a

close look at the calibrator

now the front end of the calibrator

directly mates with the front connector

of the unit it's a one millimeter

ruggedized connector and everything in

here and this module is designed by

keysight

it has their own three five process

components and i will show you from a

photograph and we'll talk about how it

works

now as i said this is a nist calibration

unit meaning that

the exact response of it up to the edge

of this connector is stored in here

and once you connect this to the unit it

will download this response into the

instrument

and the instrument will try and match

this response from the measurements it's

getting

so it doesn't even matter but that

response is as long as it has enough

frequency content

to meet the 110 gigahertz requirement

but that's pretty clever

and a good simple way to do this as long

as you can create this device and i'll

show you what that is

in just a second and now here are some

of the connectors that it comes

with the unit as well this is for

example to convert the ruggedized one

millimeter

connector to a v connector there's also

k connectors and here's a one millimeter

to one millimeter connector

and the advantage of these is that you

will just basically

age these connectors and in case

something breaks it would be these ones

as opposed to the front of the unit

itself these are much cheaper to replace

than of course the front end connector

of the instrument it will be

significantly

more difficult you have to send it into

keysight but these also come with the

uxa

the spectrum analyzer as well so let's

go ahead and connect this to the scope

but before that let me show you what's

in it and exactly how it works

and here is what is inside this

calibrator probe here so this module

that

we were just looking at this is what it

looks like on the inside

so there is an ic in the front which

take we'll take a look in just a second

and there's a signal deck which can be

fed directly

into this ic now this signal is going to

come from the auxiliary port of the

oscilloscope itself which generates a

square wave and the rise time of that

square of it is nowhere close

to 110 gigahertz equivalent bandwidth so

you're going to have to

increase the edge sharpness and reduce

the rise and fall times before it

becomes useful

for doing this calibration up to 110

gigahertz which is exactly what this

is so after a little bit of filtering

over here the square wave that's coming

from the auxiliary port is going to go

through this indium phosphide limiting

amplifier

there are multiple stages of limiting

amplifier in a row here and every time

you limit this with very high gain and

very high accuracy

you reduce the rise and fall times and

they do this a couple of times until

until it's super sharp uh with the rise

time only a couple of picoseconds

and then they feed that out from the

connector to the scope now this is

really impressive this actually means

that the rise and fall times right here

at the edge of the ic

is even more because without this

interface and the connector and

everything because

all of that is going to of course

further limit the bandwidth it's quite

difficult to get all of that

working quite nicely so having said that

this is what's inside this all designed

by keysight again

from scratch just for the purposes of

being able to do this nist calibration

directly on this oscilloscope itself

which is really quite impressive

so now that we know how it works

internally we can go ahead and connect

it to the scope

and see how it behaves and here i have

the calibrator directly connected to

channel one of the instrument

and the interface to the front of the

scope the probe interface is also

connected

and the auxiliary output of the scope

which generates the square wave directly

goes to the calibrator

now as you know as i showed you what's

inside that the calibrator here those

edges coming from the auxiliary are

going to be continuously sharpened

up until to a few picoseconds so that we

can calibrate this scope with it and

this also shows you

how what kind of fast edges can actually

be captured here by the scope

right now we're looking at 512 million

points 200 microsecond per division we

can see the square root but we're

looking at it from really really far

away

so we're going to zoom in and see how

fast those edges actually are

so let's go ahead and see what happens

so i'm going to go all the way down so

right now we're at one microsecond keep

zooming in

five nanosecond one nanosecond and we're

going to go here there's 10 picosecond

per division and check it out we're

looking at a 3.3 picosecond

edge that's how fast and how sharp those

edges actually are

and this is why you're able to use this

as a missed calibrator

the exact group delay frequency content

phase information

that's coming out of the calibrator has

been transferred to the scope

and the scope is going to calibrate

itself and change the coefficients

required

to match that exactly so the calibration

plane of the calibrator is at the edge

of the connector

and the plane of the measurement of the

scope is at the connector of

the scope itself and those two are going

to match perfectly and that's how you

get

this calibration on the channel and it

looks amazing i mean

to get a a 3.2 picosecond edge

measured live on an oscilloscope it's

never been done before for a real-time

oscilloscope

and we can also go ahead and do a

calculation and do

a quick function to show

what the pulse response looks like and

here's the pulse response

and you can also see even the ripple the

ringing that comes from the sharp edge

just simply because the interface is not

perfect

it doesn't matter by the way that it's

ringing because that ring is included in

this calibration

performance so it doesn't matter what it

looks like it just needs to match

that response exactly and that's the

beauty of it each calibrator can be a

little bit different

but you can still perfectly calibrate

the scope as long as there is a

certain performance that each calibrator

meets and you can see the

ripples here and look at this impulse

response here

this is in giga volts per second that's

how sharp this edge is this

is amazing to see this and this is a

really good way

to quickly do this and not only can you

do the calibration for the phase

and group delay and frequency response

of the channel itself

this also aligns the channels to each

other which is another important thing

because you have a single source coming

in

and that source is self-aligned to all

the channels therefore and that's

that's how you can get everything

calibrated to each other which looks

great

so here's the setup to produce a very

high frequency signal to the

oscilloscope

now i'm using an hp 83752b to generate

a signal up to 20 gigahertz and then

pass it to this military multiplier

times

six that's going to generate signals up

to 120 gigahertz

and there is a waveguide to coax

converter and a one millimeter cable

which goes to the front of the unit

i think there is something a little

poetic about using such an old

instrument

to measure such a new instrument there's

a enormous gap in time and technology

between these two units

and i wonder if the engineers who

designed this ever envision

reaching this point which is really

amazing the other advantage of using

this is that because this is a such a

high phase noise

unit and it has its own imperfections

and it has poor harmonic performance

you will be able to capture some of

those imperfections directly with the

oscilloscope

and examine how the multiplier actually

behaves as the input signal to

it increases and how it's harmonic

changes so it's going to be an

interesting setup and an interesting

result

so let's go ahead and zoom to the screen

and see what we get

so let's take a look at the output

spectrum that this instrument produces

right now i have channel one set to full

band with 113 gigahertz

at the full sample rate 384 000

points and 150 nanoseconds per division

this allows me to compute the fft

and the fft will span anywhere from zero

hertz all the way to up to 128 gigahertz

at the resolution bandwidth of one

megahertz we can in fact

look at that just to make sure the

resolution movement is one megahertz

there it is one megahertz resolution

bandwidth and check it

check the noise floor here the displayed

average noise floor

for this setting is around minus 80 dbm

this is extraordinary for such a

broadband front end for an oscilloscope

and

there's nothing connected to the input

right now and take a look

there are almost no tones at the output

of this adc

meaning every single harmonic of every

single clock that's generated is so well

filtered

and so well accounted for here there is

only a little bit of a signal at 64

gigahertz in the middle of the spectrum

and that's from the front-end sampler

very difficult to get rid of that signal

but even that is sitting at around minus

76 or 75 dbm on average

and perhaps in the future version the

final version it might be even better

than this

so having said that this is not even at

the highest sensitivity because we are

at 50 millivolts per division

if i were to reduce this all the way

down to 2 millivolts per division

the displayed average noise floor at the

same settings is going to continue to

get better and better for instance

i can go down to 20 millivolt per

division

and you can see that the noise is

already much lower even though the

resolution manual is exactly the same as

it was before

so if you need to make a very sensitive

measurement you can get noise floor much

better than

86 dbm simply because you can go all the

way down to 2 millivolt per division

which is the limit of the hardware

front end sensitivity now of course it

means that this the logic signal you can

capture is going to shrink as well but

if you need to make sensitive

measurements

that's the way to do it so let's go back

to where we were

because we're going to do some

measurements here that's going to

require a larger vertical spacing there

so there it is back to where we were

now i want to investigate and see what

happens to this multiplier

as i increase input signal power to it

and normally multipliers

have a nominal input signal be under

which they don't operate very well but

i'm curious to see how it behaves as i

change the input signal so right now i

have it at 18 gigahertz

so 18 gigahertz times 6 is 108 gigahertz

that's what i expect the multiplier to

produce

first we're going to give it minus 10

dbm and see what happens

so let's go ahead and turn the power on

to the multiplier and the signal on

there it is now you can see as soon as i

turn the signal on there are some

additional tones appearing in the fft

now you don't see it at all in the

vertical here because it's so small

but we can see that the instrument is

capturing a signal

at 72 gigahertz at minus 58 dbm

but 72 gigahertz is 18 times 4 it's not

18 times 6

which means that this multiplier right

now has a larger times

4 output than it does at time six but

even the time

six can be seen right over here is a

tiny little peak

coming out at 108 gigahertz we're not

recording it because it's below

the peak level that i have defined so

it's not capturing that peak there

but let's go ahead and increase the

signal and see how these two harmonics

interact

and what happens with the input signal

up to the output signal as i increase

that so here we go

going higher and higher you can see that

they're both growing

and the times four is still growing

we're going to continue over here let's

stop here for a second

and right now the two of them are almost

the same amplitude the 72 gigahertz is

minus 38 the 108 gigahertz signal is -41

so this multiplier is still not working

very well but i expect that as i

increase the input signal eventually

we're going to reach a point

where the multipliers input devices and

the amplifiers which are tuned to

produce

time six are going to operate in large

signal and they're going to get rid of

the other

harmonic that's undesired so let's go

ahead and try that

we're going to keep increasing it and i

expect the times 4 to begin to shrink

there it is you can see

it is shrinking now and i'm going to go

all the way to an input signal of 0 dbm

let's go ahead and stop at 0 dbm there

it is and check it out

here's our fundamental output this is

sitting at 108 gigahertz

minus 12 dbm and the 72 gigahertz signal

is at about -30 dbm

so that gives us 18 db of rejection

between the fourth

and the sixth harmonic of the input

signal which isn't really good

but perhaps for this kind of multiplier

screening off this also tells us that

if your system is sensitive to a 72

gigahertz signal

even though this is a wr10 waveguide if

you're sensitive to this signal you're

going to have to put a waveguide filter

after this

otherwise this is going to continue to

be present in your system

and the fundamental signal sitting all

the way out there is of course now

significantly larger

and you can see a whole bunch of other

harmonics here these are all the

multiples of 18 as well as all the other

harmonics

that this old synthesizer is producing

they're all mixing

intermodulation products are showing up

they're just all over the place

now to do a meticulous test to figure

out which of these is coming from what

and if any of them are coming from the

a2d converters of the oscilloscope

you're going to have to do any

a much better source is required and i'm

going to save that for

when we get the final version of the

instrument but nonetheless we can

clearly see

that this instrument is going to have a

very strong

fourth harmonic coming out this also

means that we're going to be able to

capture this in the time domain

and if i capture it in the time domain

we are going to be able to see some

double edging

because of all this smart strong

harmonics present in the spectrum

we can actually test that let's go ahead

and turn off the ffd since we're done

with it

there it is and let's go ahead and try

and zoom in

a little bit more let's keep going until

we see the sinusoid

and here we go there is our sinusoid you

can see it very clearly this is a

108 gigahertz sinusoid and you can see

double edging and triple aging and some

of this

because it has strong harmonics and look

at how sharp the trigger

is and this is because the trigger has

full 113 gigahertz of bandwidth done in

the digital domain

in the digital signal processor and it's

doing a fantastic job and you can see

how the signals spread

as they move away from the trigger point

because of all the other harmonics that

are present

but the trigger is working perfectly

fine now the spectrum signals that we

measured

traditionally you can really only do

that with

a spectrum analyzer and the only

spectrum analyzer in the world that can

give you the spectrum of this from dc to

110

is the uxa which is also from keysight

so now you can do this on their

oscilloscopes as well which is just

madness to be able to do this kind of

measurements

up to these frequencies it's really

impressive

i also wanted to show you some primary

measurements that keysight has done on

this instrument

and keep in mind that these are done on

a prototype this instrument's not

completely finished yet so these

measurements are likely going to change

and probably improve

by the time the final instrument is

released now here the instrument is set

to a bandwidth of 70 gigahertz

and at this bandwidth they're trying to

measure the flatness of the front-end

response as well as the effective number

of bits and noises some of the other

measurements

now if you look here you can see how

flat the frequency response is i mean

this is

within plus some minus 0.75 db or so all

the way to 70 gigahertz

which is a 3db bandwidth of the

instrument and this is not even the

final version

it's very difficult to accomplish this

they also measure the enum but if you

look at the enop

from dc all the way up to 70 gigahertz

this dip you see here you have to ignore

because that's cut off fighter

by the dsp anyway so really the

measurement that's only valid all the

way from dc

to 70 gigahertz the enop is just below 6

db and it's completely flat regardless

of the input frequency

this means that it's entirely noise

limited and it's not distortion limited

so that if you were to continue to

increase to

reduce the bandwidth of the front end

the enub is going to continue to get

better and better

up until a certain point where

distortion might kick in

this is the kind of measurements that i

would want to do on the final version of

the instrument

but to be able to get this is really

quite impressive the noise we've already

measured which matches these

numbers now we can go all the way to 110

gigahertz so in this case 113 gigahertz

and again you can see the front-end

bandwidth here fairly flat and this

is going to further improve once they

complete the instrument

is really quite impressive same with the

enoch is

again flat all the way up to 113

gigahertz

similarly just around five and a half db

which i'm sure it's going to be improved

a little bit more too

i'm very curious what would be the e

knob let's see at one gigahertz

with a one gigahertz filtered bandwidth

and up to one gigahertz input frequency

but

i mean take a look at this is flat all

the way up to 112 gigahertz completely

noise limited

this is really good and it promises to

be able to get better and better enough

as the frequency changes and because of

this low noise

performance of the oscilloscope and

because of the good effective number of

bits we get we can do measurements

at a performance level never

accomplished before

so here's an example of a 64 gigabyte 64

coherent modulation that's being used in

the scope as a receiver here

and you're hitting an evm of 2.8 percent

for 64 gigabytes 64 qm that's more than

600 gigabit per second equivalent

rate for coherent communication now the

previous best measurement was at 5.4

percent evm and this improvement is

primarily due to the fact

that channel to channel a jitter is less

than 35 femtoseconds

and that means that the constellation is

preserved going through the oscilloscope

and ultimately digitized

and processed by the dsp is really quite

amazing furthermore

you can do things that could never been

done before this is a 64 gigabyte 256 qm

that's a terabit per second equivalent

coherent modulation

the vm is again 2.6 percent nobody has

ever done this measurement

on an oscilloscope before all right i

hope you enjoyed this video

there was a lot of information and i

definitely really enjoyed making it i

only had this scope for a couple of days

so i didn't have a lot of time to do

detailed experiments but then i can't

wait for the

final full version to be out with four

channels so we can do some crazy setup

and see what we can capture with it now

having said that i'd love to hear what

you guys think in the comments section

let me know what you thought of the

oscilloscope and we can discuss some of

the

details of its design and if you have

any questions i'll try to answer them

i'm sure

the keysight staff would also love to

answer your questions this is a

wonderful accomplishment really for

engineering

and i think we should all celebrate that

i'll see you in the comments section