Original subtitles

Hello everyone, today we are going to study the instruction

set of eight zero eight six oblique eightzero8eight micro

processor. Earlier in a topic on how 8088 works the

functioning and working mechanism of 8088 micro

processor was discussed. The instruction set of 8086 and 8

08 8 both are similar is discussed in this text. The

eight zero 86 micro processor is a single chip central

pausing unit CPU short is a short form of central pausing

unit was designed by Intel Corporation in eighties. The

micro processor is one of the oldest one. For better

understanding the Intel architecture from the software

perspective it is still taught in many Indian and foreign

universities. In other ways it if one is conceptually clear

about the 8086 obligation micro processor it is not very

difficult to understand the architecture of micro processor

used in a modern desktop like or any other micro person.

Further the purpose and the objective of today's topic is

to understand the various instructions of 8086

instruction set. Which helps the assembly language

programmer to develop programs on the micro processor. Also it

gives the clarity to the viewer understand the operation of the

micro processor system from the software point of view. That

means we need not know the function of signals at various

pins, their electrical connections or other hardware

details rather the aspect of the study is that how the

instructions of the 808-68088 work using various registers.

The details of the various registers also were explained

in an earlier topic on how 8088 micro processor works. So we

start with the instruction set of 8086 micro processor. The

instruction set of a micro processor defines the basic

operations that a programmer can use and design programs

using these instructions. The eight zero 8 6 micro processor

provides powerful instructions set containing 117 basic

instructions. The basic instructions has a wide range

of uprights and addressing modes available so that the

basic instruction exploits into many more instructions

executable at a machine level. For example, the basic move

instruction has 28 variants in the form of 28 different more

operations with each move operation supporting our

friends and addressing modes. We divide the instruction set

of eight zero eight six in five different categories. The first

category is data transfer instructions. The second

category is arithmatic instructions. The third

category is logic instructions. The fourth category of eight

zero eight six micro processor instruction set is shift

instruction the fifth category is rotate instruction. The

first group of instructions called data transfer

instructions is used for transferring data from our one

internal register to another or provides data transfer between

internal registers and the memory locations. The group

further divides the data transfer instructions in six

categories like first is move, second is exchange, third is

translate called accelate in short. Fourth is LEA which is

load effective address. Fifth is load data source and sixth

is LES. The instruction more is used to transfer a bite R word

between registered to register or registered to accumulator or

register to mobile location pair. The table below shows the

valid source and destination upright variations. The

important thing to note about the move instruction is that

the data cannot be transferred directly between two memory

locations designated as source and destination. The reason is

that the address mechanism required to address source and

destination may occupy more bites increasing the size of

the instruction. Instead the more instructions are available

to transfer the data from memory to internal registers

and move them to the desired mobile location. So as memory

memory operation is dealt with the help of two instructions

the instruction for example Moo AL comma BL performs the data

transfer from the contents of the register BL to the register

AL since the operants are 8 bits the move operation is

called eight bit data transfer operation the instruction move

DX comma CX performs a 16 bit data transfer and transfers the

contents of register code segment which is 16 bit to

another registered DX which is all 16 bits. So it is called a

sixteen bit data transfer operation. Now another category

of moo instruction is register memory operation. In all memory

reference moo instruction the effective address of the memory

location is computed as the offset specified in the

instruction added with the contents of data segment

register which is shifted left by four bits to make it a 20

bit register. Take exam example of say instruction is move sum

comma X. In this instruction the memory location identified

by the variable sum is specified using direct

addressing. Let us assume that the contents of the data

segment register is equal to 200 hexa decimal and the sum

corresponds to the displacement of 1212 hex. Then the physical

address of sum will be computed as 0200 with zero offended that

means it becomes a 2000 hex plus 1212 is added that makes

the address as 3212, hex a decimal is completed the

contents of mammal location 3212 H are then used to store

the contents of L the contents of H which is the higher eight

bits of the register AX are then stored in the next mammal

location 3 2 1 3 X. Thus the effect of the instruction can

be explained as L is transferred to the mammal

location 3212 H is transfer to the mammal location 3213, which

is the next mammal location after three2one two. The next

category of move is exchange instruction. In a exchange

instruction the short form of exchange is XCSG. The contents

of the specified operate pairs are interchange. And in X

exchange operation can be performed between a pair of

upper ends using multiple move instructions however certain

application requires this task to perform efficiently the

exchange instruction called XCAG in short performs the

exchange between a pair of upper ends. The upper ends

could be registered to register or memory to register or

accumulated to register. For example exchange BA's perform

the exchange operation if the contents of the register before

the execution of the instruction were 1212 H and

3434X respectively after the execution of the exchange

instruction the contents of the X and BX respectively will be

3434 X and 1212X the next category of the data transfer

instruction is excellent instruction the X instruction

has been provided in 808-6808 8 instruction set to simplify the

implementation of look up table operation when using excel the

contents of the register BX represent the upset of the

starting address of the look up table from the beginning of the

current data segment the eight bit register AL represent the

upset of the element to be access from the beginning of

the table. The ad bit address specified in the ale restricts

the size of the look up table to 256 bytes only. The value in

both BX and ale must be appropriately initialized

before the execution of X rate instruction. The X rate when it

is executed replaces the contents of ale by the contents

of the memorial location specified by the following

address competition as explained earlier again four

bits are upended to the data segment register making it a 20

bit address this 20 bit address is then added to the register

16 bit BX followed by addition of AL the contents of that

mobile location are replaced in the AL the example of use of

this instruction is in software code conversion from S key to

Abject are absorb format to SQ format the storage format of in

desktop or uniques computer system is in SQ format.

However, the storage format on the IBM mainframe is in

abstract format. A file stored in the SQ format must first be

converted into abstick format before being used in a main

frame system. To achieve the data transfer, a table of

characters stored in the memory. The individual abstract

codes are located in the table at L displacement equal to

their equivalent SQ character values. That means the code

Cone H for letter A would be stored at displacement 41 H,

which equals the SQ character of character A from the start

of the table. The XLED instruction converts the value

stored in AL into its corresponding entry in the look

up table using XLED does a character stored in the S key

format may be converted to abstick format. Another data

transfer instruction is load effective address. That is

called LEA insured is used as LEA SI which stands for source

index register comma input. When this instruction is

executed, it's loads the SI register with an offset address

value derived from the label input. The value of the is

represented by the value input as shown in instruction. The

other two instructions LDS and LES are similar to LEA except

that they load the specified register as well as the DSRES

segment register. For example, consider the instruction LDS SI

in brackets 200. The execution of the instruction loads the SI

register from the location in the memory whose offset address

with respect to the current data segment is 200 hex if the

contents of the data segment register are 1200 hex then the

physical address will be computed as 1200 again zero

will be appended making it 12, 000 hex and this will be added

to the input which is designated as the 200 address

overall when two are added the effective address is 12200 hex

the content of the 12, 200 hacks will be transferred to

lower bits of SI register and the contents of memory location

12, 201 hacks will be transferred to upper bits of SI

register. So this is how the instruction LDS works. Next we

talk about the arithmetic instructions of 8zero8 6

oblique 8088 micro processor. These instructions are used to

perform operations like addition, subtraction,

multiplication and division operations. These operations

are available on upfronts in which the numbers are stored in

a variety of different data formats. The data format can be

unsigned or signed binary numbers. BCD format are the

number represented as the sequence of characters in SQ

format. In BCD format the two digits are packed in one bite.

Whereas esky format one digit is stored in one bite in its SQ

code. The result of an arithmetic operation is

generally stored in the accumulator register. However,

it also affects the status flags. That means the execution

of an arithmetic operation affects the status flax. The

flags that are affected by the arithmetic instructions are

carry flag called CF inch auxiliary flag called AF in

short, sine flag called SF in short, zero flag called in

short, parity flag which is PF in short and overflow flag

which is OF in short. There are five different addition

instructions. The first add instruction has a format at D

comma S. Which performs the operation S plus D that means

it adds the destination in the source and stores the result in

D. The D is either a sixteen bit accumulator register called

X or an eight bit accumulator register called L. This L which

eight bit accumulator register is a part of the bigger sixteen

bit X register. Both the arithmetic operation whether

eight bit operation or 16 bit operation affect B status

flags. The carry flag which is called CF in short is set to

one if carry is generated out of the result. The auxiliary

flag is set to one if the carry is generated from fourth bit to

fifth bit in case of an eight bit addition and eighth B to

nine bit in case of a sixteen bit addition operation. The

most significant bit of the result is copied into a sign

bit. And therefore the sign flag is affected as per the

status of the most significant bit. The zero flag is set to

one if the result of the addition operation is zero. The

S in the instruction add the comma as could be one of the

data registers or a constant number specified along with the

instruction. A variant of the ad instruction is ADC D comma S

which performs S plus D plus carry operation. That means

along with the two operants specified in the ad the carry

is also added into the result. And accordingly the result of S

plus D plus C Y flax are affected. Insure the addition

of the two numbers is added to the carry flag in the ADC

instruction. The next instruction INCD increments the

specified opera by one and accordingly affects all the

flags. Similar to the addition operation are add with the

carry operation. For example, INCAL increments eight bit

register AL by one. Similarly, INCA's increments the sixteen

bit register by one. If this sixteen bit register reaches

its maximum value increment by one initialises the AX back to

zero. That means the zero flag will be set to one if the

result of the increment AX operation is zero. The next

important arithmatic instruction is TAA which

specifies decimal adjust for addition. The instruction is

useful when the number is represented in BCD format and

the expected result of the addition of 2 BCD number should

also be in the BCD format. Take example of two decimal numbers

85 and 45. These numbers will be represented in the BCD

format as 85 hacks and 45 hacks. As we know in BCD

formats, four bits are allocated to every digits. So,

four bits in binary are needed to represent a digit. That

means it number 85 will be stored as 85 hacks the number

45 will be stored as 45 hacks in the BCD format when the

addition of these numbers is perform using ad instruction

the result is CA hacks when the DAA instruction is executed

after the ad instruction it adjust the results and brings

the result in BCD format the operation found by the DA is

that it checks if the four least significant bids of the

result is greater than 9 or the auxiliary bit is set six is

added to the first four least significant bids similarly the

four most significant bids of the result are checked to find

if these bids are greater than nine or the carry flag is set

during the previous ad or ADC operation six is added to the

most significant bits. As a result when DAA instruction

executes over the addition of edify and fortify the result

CAH is converted into 20 hack certicimal with a carry which

is in turn the result of the addition of two numbers edify

and fortify H in BCD format. Therefore, the DAA instruction

is useful to make the BCD arithmetic efficient and saves

a number of instructions other wise required to achieve the

same result. The next arithmetic operation are the

instruction available in the 8086 micro processor

instruction set is AAA which implies S key adjust for

addition. The instruction is useful for adding two numbers

when every digit of the number is expressed in S key format.

For example, a number two, three, four, three, if stored

in the S key format will require four bites of storage

because every digit requires one bite and that bite

represents the X key equivalent of that digit. Every bite

contains the S key equivalent of four digits. In the example

of a 4 digit number, the four bites contain values 32 hex,

3-3 hex, 3-4 hex, 33 hex which are nothing but the SQ

equivalents of two, three, four, three. The instruction

operates and adjust only on the register AL and therefore it is

mandatory that the result must be brought in the register AL.

Assume you have to add two digits two and four stored in

registers AL and BL in SQ format as 32 and thirtyfour.

First and operation add ale come of BL is perform. The

result 66 H is stored in the ale. When triple A instruction

is executed, it subtracts sixty hexa decimal from the ale. If

the result is greater than nine, further a number 10 is

subtracted from ale and H is incremented by one. Else, the

number L contains the result of addition of two numbers. In the

example, it contains 06 in AL and zerozero in AH. If we add

two numbers 36 XL decimal and 37 XL decimal the register AL

will contain three and register AH will contain one after the

execution of the instruction at followed by triple A

instruction which stands for S key adjust for addition. So

what we have learnt today are the various of eight zero eight

six, how they are executed, the instructions related to data

transfer and arithmatic instructions like ad were

covered in detail. Thank you.