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hi there this is grant jennings from goin semiconductor and today i'm going to walk through
our usb solutions and roadmap and particularly talk about a new solution that we have which is
a usb 2.05 capable of high speed interfacing at 480 megabits per second for the usb 2 spec
this is a one of a kind solution you know no other fpga company in the world has it has ever done it
and so we're very excited at going for it being the innovative fpga semiconductor company so let's
get started the agenda here is we're going to go through just a brief overview to kind of align
everybody on goin products so i'm just gonna give a very brief overview of gohan's product portfolio
and then i'm going to talk about new products and solutions coming soon then we'll go into some
focused usb solution discussions and an update there and we'll go a little bit
deeper into our usb 2.0 solutions including the phi as well as the link layer or sie
as it's called in the usb specification and then we'll go into a usb solution road map
this is just kind of where now that we have usb 2.0 and you're capable of using it on any go on
fpga what are some of the demos and solutions that will be coming available in the months to come and
the rest of this year and then we'll go into some use case examples uh we'll talk about development
boards and how you can actually and your customers can actually test out the usb 2.0 solution
and then we'll go into uh where you can get some support for for go and design services
and uh just a little bit of some links to some other resources that may be useful
so let's get started uh first let's go into the product summary and i tried to just keep that this
we have other slides that you may have seen from sales that kind of go through a table of different
capabilities but i wanted to keep it really simple as of today we have two product families
a non-volatile family and a volatile fpga family family so non-volatile it has embedded flash
typically smaller density great for interfacing and bridging type applications we also have you
know devices with some extra capabilities but this is all in the 1 to 20k lookup table range
um so before it was 1 to 10k it's actually a new device that pushes us up to the 20k range which is
pretty unique in uh in the market right now then traditional fpgas we have a 20 to 55k
lookup table range a little bit higher performance fabric more io and uh you
know some other capabilities that are not on the non-volatile but you don't get the flash
so then within that one of the unique things about going semiconductor is our hybrid fpgas so if you
see in the part number an s that means that it has an embedded hardened cortex m3 hardcore processor
if you see an r in the product name that means that it has an embedded extended user memory
and it can be around 4 to 16 megabytes depending on the device chosen it could have varying bus
widths and it could be varying types of memory it can be psram sdram or ddr so you can choose
the right type of memory for your application you can also have extended embedded user flash
e-series is our security fpgas and these have a puff based embedded security
core within them and that basically means that the key generation is asynchronous key generation
and the keys are generated at power up based on sram puff technology
and then we have rf series um gw1 rf series so if you see a rf in the series name that's an
fpga plus a hardened mcu and plus a bluetooth low energy transceiver 5.0 to be specific so hopefully
that just that's pretty much going semiconductor product line from the devices in a nutshell
so now we're going to talk about new and upcoming semiconductor products so these
are new devices that are either here now or uh coming soon so first we have the gw2 an 18x so
this is an 18k uh it's actually 20k um the the titles the part number's a little deceiving
so there's a few extra luts but around a 20k lookup table device um that's non-volatile
and it has very fast boot up um from the embedded flash it has embedded security
so it has the puff base security and it also has pin compatibility to other semiconductor devices
then we have the gw1n2 now this is a 2k non-volatile device and the key thing about
it is that it has two gigabit per second rx and tx mippy d5 hardcores so you have true mippy rx
at up to two gigabits per second and the speed on that we know at least uh two and we're
working to to get a little bit more using the pre-emphasis capability and then on the tx side
you have true uh slvs 200 high speed and 1.2 volt low power mode capabilities to provide a true
mippy d5 interface so that's really good and also those uh one and two i believe that there are some
r series of that so if you need some frame buffering in there this device is really for
video bridging and uh video interfacing as well as some processing and you know it's pretty common to
sometimes need a frame buffer in those use cases so the r series is available for that as well
automotive devices so we have our first automotive devices and we have a 1k non-volatile as well as a
20k volatile fpga to kind of cover the automotive space and these devices are aec100q qualify
assps so this is something new to go in but we have a series of application specific chips
coming out um the first round of them is really specific to usb to another interface bridging for
basically programmer cables and programming so we have a usb to j tag we have a usb to spy
we have a usb to ur and we have a usb to is i2c assp so you can look forward to that
you know there are some of these bridging chips that are readily available particularly like usb
to uart just due to programming microcontrollers but other cases like usb to jtag usb to spy
and usb to ic there's a lot fewer solutions on the market and as a result the devices
are a little bit more expensive so we think that our assps provide a really
good um affordable and competitive competitive solution in the market um
and so we're really excited about that and then the last um you know kind of updated
product um silicon product update is that is the x series so we have several devices that provide
pin for pin compatibility to devices that are either ended end of life long lead time or um
for customers that are using an existing device but would like to add some new features some new
capabilities and they need larger density but also pin compatibility really is helpful to them
i need to make one more product update regarding a legacy device the gw1ns2
this is different than the gw1n2 that is just being released with the hardened d5 cores
the gw1 and s2 was a 2k lookup table fpga with hardened cortex m3 and hardened usb 2.0 phi
this device has had some issues related to the foundry that it was fabricated on
all of our production devices are fabbed on tsmc however this other device was was fabricated at a
different foundry and that led to some issues so it's been kind of still on the roadmap to
get it working and it still technically is however one of the major things that's broken on it is the
usb 2.0 hard fi in 2.0 mode and we after that we released a gw1 and s4 which still has the
hardened cortex m3 but it doesn't have the usb 2.0 hard fi and then now we have the usb 2.0 software
which works just as well so there's a good chance that the gw1 and s2 will be discontinued because
we have the 4k which is an overall lower cost but more resource intensive device
and we have the usb 2.0 software solution which can be used on all of the current go and devices
so it's very likely that we will discontinue that device as the two features are already covered in
a broader spectrum with the tsmc foundry devices so that's kind of updated semiconductor products
um from going let's let's go into uh some solutions update so this is not all of the
solutions that are kind of coming down the pipeline but it's a few that i thought were
notable there's several solutions going on right now it's pretty exciting what has been
being developed with our devices and how much they've matured and advanced
over the last you know few years so first is a foc motor control ip solution
so this is an industrial motor control solution providing high precision and parallel
feedback loops for controlling multiple motors you can show one more or two but one of the you know
situations that our customers tend to gravitate towards this solution over other motor control
solutions is when they run into an issue where they need to either increase the number of
i o that the cpu have and particularly the the types of interfaces so the adcs
and some of the gpios and encoder links like rs485 i believe they need to increase the number of
of interfaces for multiple motors and then also the cpu needs to increase in performance
to accommodate these motors and typically the cpu has to kind of dedicate itself to to the to
each individual motor and give it with a real-time operating system give it preference and priority
because if you start running some other application it starts bogging down the system and
you don't have a real-time operating system your motors could start slowing down and going all over
the place so what the fpga solution provides is an fpga either in between the cpu and the motors or
the mosfet drivers or you can actually embed the cpu inside the fpga and have a one chip solution
what whatever your preference is um but each motor control loop runs it completely independently and
that we provide an api for the cpu to call each of the current control loop modules so this way
there's no no bog down on the cpu and the motors can run independently and when you need to make
an adjustment that api call just adjusts that motor and that current control loop in the fpga
so it's very um good solution and provides a lot of higher precision control at a i would say a
much more cost-efficient overall bomb solution we also have a simple motor control ip this is
for doing just very simple motors like maybe in toys or
consumer applications and we actually have this on the gw1 and rf so you can actually control a motor
through bluetooth low energy or multiple motors for smaller motors for consumer applications so
that's pretty unique and pretty interesting then we have go ai 2.0 which is our machine learning
inference and npu solution and hardware ip so we have several new demonstrations that have come out
over the last year person detection car detection digit detection analog meter detection multiple
digit detection different input sources so you know different cameras different hdmi inputs audio
audio classification gesture control several demos and there's there's some next generation
stuff coming that you can look forward to on that basically mainly around improving performance
but i would assume some additional demos that you can look forward to there
and then lastly the image signal processor ip so this is if you're if you're not aware when you
have a system with an image processor sorry when you have a system with an image sensor
a lot of times there is not an image processor built into that image sensor
so the data that you get from the image sensor is just raw pixel data and that pixel data needs to
be processed using an image signal processor now a lot of times this is built into an soc or you know
a larger processor device there are dedicated image signal processors as well but if you're
doing any sort of image processing on fpga you need a in a lot of cases you need a image signal
processor pipeline if you want the image to look good some cases you don't need it um you know if
like in the case of go ai if you if you train the model to accommodate that that you could remove
those resources and not need the image processor but in a lot of cases if you're going to output
that image and use it for something or display that image coming from the camera you need an
image signal processing pipeline to make the image look correct so that's a great new additional iep
and then the usb 1.1 2.0 and the phi and the sie so already in ipcor generator within gohan eda
there's a sie or link layer for usb 1.1 and usb 2.0 and you can either use that sie
with an external usb 1.1 or 2.05 or an internal usb 1.0 or 2.05 also within goin ip core generator
we have a usb 1.1 phi and you can use this on virtually any of the ios available on any of the
goin devices and so you can instantiate a usb 1.15 inside the fpga providing a you know link layer
with the sie and the phi for 1.1 which is capable of about 12 megabits per second
lastly what i'm going to go into more detail is usb 2.0 which is capable of 480 megabits per
second and this is a really challenging ip to do and that this is why it hasn't been done before
it involves clock data recovery at 480 megabits which is kind of too low for a lot of the
embedded certes type fpgas but also too fast to just use gearboxes with over sampling and so we
have a you know we've built a solution around a recovery method for the megabit signaling using f
gowen's dedicated high-speed i o capabilities and features and that's a patented solution that we're
really excited about because we've had a number of requests for usb 2.0 interfacing but haven't been
able to service them and nobody's really in the market has been able to service them until now so
please reach out to your customers if you've had a customer that has talked about usb and needing usb
on their products uh we've got we've got the solution for them and we would really like to
engage and you know make some opportunities happen with either usb 1.1 or usb 2.0
so the usb 2.0 you know the launch of usb 2.0 phi is on around may 15th
of 2021 and you'll probably be seeing this presentation around then so at that time the
latest version of going eda with ipcor generator will have the usb 2.0 softfi available for use
in in the eda tool so it's already ready to go and you can virtually again with a few limitations on
the 2.0 because you need to use the the high speed io but virtually any io any fpga that gowan has an
offering for you can use the usb 2.0 software so you can have multiple usb 2.05 no problem there
so here's a little bit more focused update going is now a member of the usb implementers forum and
we have 1.1 and 2.0 solutions so 12 megabits per second and 480 megabits per second 1.1
is still used a lot for control and just basic communications and actually usb 1.1 is kind of
included with 2.0 so so 2.0 is actually capable of a 12 megabit mode and a 480 megabit mode
usb 2 generally has applications that are more data transfer specific since the data rate is up
um so in ipcor generator we have all these ips the 1.15 2.05 1.1 and 2.0 sie
and it's kind of defaulted to a virtual com port scenario but you can use it for other things
we just use that example because it's uh we like the virtual com port because there are native
drivers within windows 10 windows 7 windows 10 and linux that makes it very easy to just get started
and i'll explain a little bit more about that later we also have a usb type-c power delivery
solution and so you can actually you know if you have customers that are interested in us
usb or usb type-c you can actually combine these ips together for uh you know a total usb solution
and then lastly we support primarily just out of the box the virtual comport
type solution because again it's the the driver capability makes it very easy to use
however there are other device types being explored like video over usb things like that
and that will just basically as as the solutions build there will be more um more device types
and you can program these for different device types that the si is fully programmable
so lots of good opportunities there for new and unique solutions
okay so now uh we're going to go into just specifically usb 2.0 finesse ie so this is again
a brand new solution to the fpga market previously before this solution that only gowan has
you had to use an external phi to interface a separate chip to interface the uh to interface usb
2.0 with an fpga and there's a patent pen pending implementation for this
that is uniquely capable on gowen's high speed and flexible fpga i o
supported in all going devices um with exception to the 1nz which is our ultra low power device
it has overall lower performance so that just due to its low power and
so that one's not supported but everything else is and then devices can support as many usb 2.0
interfaces as the i o permits so that means that you can do things like a usb hub uh you could do
a hub of you know usb to pcie you could or you could do or sorry excuse me a pci you could do a
you know you could do the the possibilities are pretty much endless you can do microphone to usb
you could do multiple microphones to usb you could do um usb to device to usb host you could do hsic
to usb there are many options and this is just an interface to allow customers to be creative
with whatever they want to build so now i'm going to go into usb 2.0 phi and sie
just some information related to it so the usb 2.0 and 1.05 run at 60 megahertz this is native to
the deserialization process and the over sampling process that's pretty common with all usb
utmi interface fis as well as the sies and then just 2.0 runs faster so 480 megabits
and usb 1.1 at 12 megabits the resources for the 2.0 are a little bit larger just under 2k
lookup tables so this can fit in as small as a 2k device and uses five block ram versus the 1.1
solution which is three block ram so you know i just mentioned this so if you have like a really
tight or cost you know sensitive solution we have a we've had a lot of customers before we even had
the usb 2.0 solution they would come to us and say i need a usb 2.0 solution and a lot of them
as we started to communicate with them they just needed a usb 2.0 solution for basic control
and communication they didn't need the full 480 megabits and there are some i o advantages and
some resource advantages to the 1.1 solution so if you just need 12 megabits go with the 1.1 solution
don't don't go beyond that and so i would say a lot of there is a lot of customer opportunity just
for the usb 1.1 solution and then if you need the extra bandwidth 2.0 is available and this is just
a block diagram of what um what the fi and the sae look like you know if you were to place both ips
in the fpga and we do have a reference design for this and basically the phi and the usb sie talk
over a utmi plus interface which is the common interface between the phi and the link layer
okay usb solution roadmap so 1.1 is available now 2.05 is just released and these are the
eda numbers that it should be the sie for 2.0 and 1.1 is available now we have reference designs
for virtual com ports virtual com port device id and then we have a video video over usb solution
that we're working on and then you can expect other protocols and other examples to follow
we also are working on a csi2 mipi csi2 camera to usb 2 reference design so this should be pretty
unique and pretty cool kick off about for this is mid main you should expect it sometime in q3
we also have an hsic reference design in progress so hsic is basically usb 2.0 for inside inside
embedded devices so it's basically kind of like usb 2 but inside like let's say a pc and the
benefit of using hsic is that it provides a clock lane so you don't need the clock data recovery
so it's kind of similar to like mipi csi 2 if you're familiar with that protocol or maybe dsi or
maybe d5 and this provides both a power and a cost and a ease of use benefit for situations inside
on on ship or on the board so that's it's used for things like inside a pc however once you go
outside the pc and you're going over a cable you can't really send a clock and data over wire pairs
over a cable things get out of alignment and even if you have alignment capabilities there can be
you know uh issues with the uh the peak to peak voltage being reduced and things like that so you
need a little bit more advanced recovery system and so it's best to use fewer wires which just
makes the cable cheaper and embed the clock within the data which also helps
with the voltage levels um if the data basically in the when the when the clock is encoded
in the data the way that it's encoded means that there's an equal balance of zeros and ones which
means that the peak-to-peak voltage doesn't drift and that's that's the benefit and that's why
we typically use embedded clock on cable interfacing so but there's a
lot of opportunities for going from hsic for communication inside on the pcb and then going
out on a cable with usb 2.0 and so that's exactly why we're building that reference design
so mainly on the usb sie side we have the device side so it's just a more popular use case
however we have basically for our testing purposes we have the the code to do a host solution as well
so this would be you'd use the same fi but you'd be able to do
a host link layer and communicate with usb devices so this in progress is a little further out but
q4 around that time frame of this year please let me know if you see any usb 1.1 or 2.0 host
solution needs and we can communicate and talk about that and see
see make sure we understand their needs and make sure it's aligned with that target completion date
lastly we have an mjpeg encoder and this is in progress uh you know sometime around the q4
time range this is needed for things like uh the csi2 to usb solution um or it may be so
we have it kind of on the roadmap that it's something that we'd like to do we see
you know some need and if you see any you know use cases or opportunities there
related or not related to usb please let us know and we will try to understand those
customers needs as best as possible and adjust our solution roadmap accordingly
and then also the bridging assps which i talked about earlier these are application specific chips
that just do the function they do so usb to jtag usb to spy usb to i2c usb to ur and
i2s audio to and from usb you can expect these around the q3 time frame and they're they're
currently in testing and so i think that that that's where on the timeframe will be available
okay so now i'm going to go into use cases now i have to make it clear that some of these are will
be available and some of them are just theoretical use cases to start engaging with customers um the
big feat has been conquered which was to get the usb 1.1 and 2.0 solutions available but now we're
gonna go into you know what you could use it for and some of these are built like the example here
for usb bridging so usb to jtag usb to spy usb to i2c usb to ur and i2s audio to and from usb
so yeah this is just a high level diagram of those same use cases as the assp but we also have them
in fpga solutions as well in case a customer wants to expand add some buffering some extra features
another usb example is the usb sorry csi2 to usb solution so here's a diagram of that and then also
usb to dsi so let's say you have a small display and you want to interface to that display over
over usb that's also possible and that solution we don't have you know it's not on the roadmap but
if you if you see a customer that is interested in that we can certainly discuss that with them
okay usb to bluetooth examples so going to or from bluetooth low energy since we have the gw1 rf
device you can definitely make a usb to bluetooth low energy dongle so that's pretty unique and this
solution is is not something that's on the roadmap but would be actually fairly straightforward to
put together i think so please let us know if you see any opportunities in this area
data and storage buffering so sorry data shortage and buffering these are just a couple
kind of high-level solution ideas so the one on the left the diagram on the left is showing
basically using the embedded user flash of the little b product family the non-volatile family
and use utilizing that that internal flash to connect to usb 2.0 and so this could be used for
let's say security dongles where you may have some
some key pair in the flash you could also use this with our secure fpga solution
and this would basically provide a non-volatile region that you could access over usb 2.0
and then on the right side this is taking advantage of the extended ps ram
devices the r series devices i mentioned earlier and it's just showing that you know you got four
to eight megabytes of extended ps ram memory in the fpga you could also interface to external
memories with the goin device like ddr and you could have some input data you could buffer it
and then read it out of usb2 at your own pace or time depending on the application so this is
pretty interesting could be very useful for data acquisition like data acquisition cards if you've
got you know a bunch of wires monitoring some system you can store it and then buffer it out
have it buffered and then read it out on the pc win as needed
this is kind of another idea of a traffic monitor kind of similar to the data buffering case
where um you basically just have
a usb to usb passthrough but then you can monitor the usb traffic and particular usb data and
this can be you know really useful as as a usb snooper line snooper and in fact
you know i use this a lot during deep when i was debugging um or testing the usb 2.0 solution
but um this can uh you you don't even need to build a gui for this um you can actually
just use goin's gau going analyzer oscilloscope so it's our built-in fpga logic analyzer you can
just use that to monitor the data and actually record it and save it to a file so for you know
debugging solutions traffic monitoring solutions over usb 2.0 this is a great uh offering
so lastly is kind of the the multi-port hub concept so as i mentioned you can have multiple
usb phi interfaces and so using the host solution that's on the roadmap along with the device
solution this allows you to do usb hub and one thing i left out is there's also opportunity to do
usb hsic for the device interface and then go out to multiple usb hosts as well so true usb
hub chip and you can make all of the virtual types of channels and that you want
okay so those are my my kind of high level use case get your ideas flowing examples and now
i'll talk a little bit about how you can actually have customers test these examples and get started
so um the the usb 2.0 solution as well as the 1.1 solution are are
very um robust at this point i feel and uh we do have a production board that is actually our
dk start gw2a18 board that has been modified just one of the connectors has been removed
and it's been replaced with the usb 2.0 port running to the fpga and you can do usb 2.0 or
1.1 with this right now the board is in very limited supply because we had just our first
test run of the boards but it does work and if you know there is a high customer need we can get you
one of those boards temporarily and then we have production availability of that this board around
june 15th so you can expect it on the website you can expect it um through your distribution
abilities to obtain it and then uh there also is another internal board that has
just arrived internally and i there is limited supply but it's another option the nice thing
about this board is that it has a little b and aurora device on it so if you have a customer
that may want to focus on little b um we're doing that validation as well this board is also in very
limited supply but we can make exceptions for particular opportunities that may arise
so in addition to all of this we're building up the go in design services capabilities um a lot
and so going i call it gds and we're kind of expanding on this is going design services
it's our applications engineering team providing design services for customers that want to build
application specific solutions and they need some design consultations to
get them there maybe they're not so familiar with fpgas maybe they're a little uncomfortable because
they've never used going fpgas before and they need a little it could be as simple as just hand
holding some some support to get started it could be as extreme as doing the whole design for them
and so we're building up a platform to provide this capability so providing custom application
specific design consultation and providing hardware as a service is what we like to call it
and uh so as of right now you can it's you will see this expanding over the next year
but for now we're just basically going through the info at go on semi email and so
any potential design requests you want to submit you can either submit them to your go in sales
sales director directly or you can send them through info go on semi.com you can also just
send them to me i have no problem with that and uh you can also you know i just put the distribution
page which has access to um you know many of the distributors and reps that may also be able to
community support you or at least i put this here just in case this presentation
has a derivative customer facing presentation and this would provide them the access point to
communicate with you the distributors or the reps and then for any design service just be ready to
provide us the following we're going to be asking for it if you send us an email without it so
we need to know the design requirements as detailed as you can possibly do and one thing
that's very very very helpful that is a lot of times missing is a technical block diagram if
you can draw a block diagram of it it provides us a picture of what you want it's very helpful
also you know on the design requirements one thing that can sometimes be missing as the speeds
that things need to run at that's also useful and anything you can provide a little bit at a higher
level about the application like if it's using 2.0 what is it interfacing too is it a computer
what kind of data are they going to send things like that the more information the better
projected volume is really important for us because it helps us determine our nre structure so
i don't think most customers don't have a problem with what they're projecting if you could provide
that that would be great and then estimated nre budget for design development so we really want
to get into the habit of asking this question because it's often not asked and then it becomes
you know potentially an issue later so you know you we've got a customer opportunity it comes
into sales we have apps engineers that spend time to research and and and understand the solution
that needs to be developed and maybe does some pre-development to make sure that we can do it
and then they come back and say yep we can do it um how big is the volume you know if the volume
is small then uh we request the nre and the customer i think feels kind of um a little bit
uh blindsided at that point so we i just appreciate if we can get into the habit of just
asking um you know do you have an nre estimate for doing this design for you and if you know if
there's hesitation we say well based on the volume you know we might not even need it or based on the
roadmap it might be already something we're doing but we do need to ask because we do spend a lot
of r d budget to to develop these designs and sometimes you know plans change projects change
so if you could help us help you by just asking this question up front it'd be very helpful
and then other resources so if you're new to usb or want to understand more educate
yourself i highly recommend this usb made simple website it is great it goes through usb 1.1
2.0 it goes through things that i always refer back to it there's things that i still don't
know about usb and it is on the site so i highly recommend it if customer has some questions or
you know thoughts it's a great great site to utilize also the usb 2.0 specification itself
itself is available for free and the usb utmi interface specification is also available
there are some things i will say that the usb utmi interface that's the interface between the phi
and the link layer that are discussed in the utmi specification that i feel are vague in the 2.0
specification and vice versa so um i would if you know i would provide both um to your customer at
the same time and if you're educating yourself i would look at both and then below i just have
the social media pages for going something that your customers can reference i do intend to make a
customer friendly version of this presentation and video so um that's kind of why it's there and you
can expect that there will probably be some usb demo videos available and there also is a quick
start guide for the dkstart uh dk dkstar ar18 usb board so that's a starter guide that allows you to
do a virtual com port data loop so you send data to the host and then you receive it back and then
it also if you press numbers it will light up leds so if you press numbers on the keyboard
it will light up a corresponding led and then also if you push push buttons on the board it will send
a message back to the pc so pretty basic but pretty cool demo and that's all running at 2.0
and that you could also do it with 1.1 we're not pushing the performance
the performance is native to the protocol when you're in each mode so basically if you go into
2.0 the packets just transfer faster that's it for me i hope this was useful please let me know
what i could add or subtract particularly for the customer facing presentation version of
this and i look forward to helping you go in by programming for the future thanks a lot
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